11/27/2023 0 Comments Arduino due i2c![]() ![]() The isolator filters 50ns glitches and increases fall time.įurthermore, arbitration of the bus is performed internally by hardware and puts the TWI in slave mode automatically if the bus arbitration is lost. It seems the answer is to use a fast-mode compliant isolator like the PCA9517A. I did tests between two DUE (One in Master mode, the other one in Slave mode) and I had to use a very short jumper between grounds to make this work (no builtin glitch filtering). I have only a short experience with this interface but I found it extremely sensitive to EMI, e.g. For safety, you can consider having a reset line from the Master (DUE) to the sensor in case a reading can't be performed after a certain timeout. You can try to write entirely the program sequence needed without any blocking code using TWI registers. If you don't set the stop bit properly, the DUE will send an ACK instead of NACK on the last read. ![]() It expects you to set the stop bit in the control register before you send the next to last byte if you read several bytes, or at the same time you send the Start if you read only one byte. The DUE I2C interface (Sam3x8e) is somehow different from the one of an AVR chip. This will help test and discuss several approaches I will also try to make a minimal piece of firmware that includes only the communication with some of the I2C components. So my question is somebody having or already solved a similar problem or can you give me a hint in any direction. ![]() I was looking into the wire library of Arduino and correct me if I'm wrong but unfortunately I couldn't find any error handling that can handle a situation like this. Unfortunately I can not make a HW reset nor can I make a power cycle cause everything is combined in a moving system and would be damaged/not working properly if doing that. Use the HW reset or cycle power to clear the bus." That held the bus LOW should release it sometime within those nine clocks. "If the data line (SDA) is stuck LOW, the master should send nine clock pulses. ![]() I was carefully reading the NXP (Phillips) document for the I2C bus specification and in section 3.1.16 Bus Clear you can find the paragraph: That's why I ask you if someone has an idea to tackle this problem from the software side. And that being said I work full time on investigation hardware related problems but couldn't find any obvious problems yet. The hardware is pretty big and is hard to explain in this topic. With a higher sampling rate the clock is perfectly fine.Īlthough the root of this problem might be hardware I ask you to discuss software based solutions here. It was necessary to set it that low so I can capture a longer period of time. Please be aware, that the different clock pulse length on the logic analyser picture came from the low sampling rate of 200kHz. Attached you can find a picture from the logic analyser capturing the moment of the bus lock up and an oscilloscope picture showing the signal quality. The Due is configured as master and is connected to several slaves, PWM chips, temperature sensors, EEPROM. I assume that the communication cycle is somehow disturbed and one of the slaves is holding the bus low. More precisely I'm having random (several times a day or none at all) the situation were the data line of my I2C communication is stuck low. As the title of this topic says, I'm having problems with my Due using I2C. ![]()
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